The present invention relates to a memory having a plurality of erasure-unit regions in which data are erased or written in predetermined units, and more particularly, to a data processing device using, e.g., flash memory.
Flash memory corresponds to semiconductor memory in which data can be electrically written or from which data can be electrically erased. Flash memory is characterized by the ability to retain memory contents without a power supply. Particularly in the field of industrial computers, flash memory is often used as a storage medium, substituting a hard disk.
However, new data cannot be written directly in flash memory. More specifically, data must be collectively erased in units of, for example 64K (Kilobytes) (hereinafter referred to as xe2x80x9cerasure unitsxe2x80x9d), before new data is written in the flash memory. After data has been erased in erasure units, new data corresponding to the size of the erased data is written, thus rewriting the data stored in the flash memory.
Particularly, from a structural viewpoint, in large-capacity and high-density flash memory, an erasure unit is larger than the unit for rewriting (hereinafter referred to as a xe2x80x9crewriting unitxe2x80x9d). For this reason, in many cases, data used for rewriting is greater in size than the erasure unit. Even in a case where such data is rewritten into the flash memory, data must be erased in erasure units, which may comprise data segments that do not need to be rewritten, and the data containing the erased data segments must be written into the flash memory again.
A technique for rewriting data in flash memory is described in the Unexamined Japanese Patent Application Publication Kokai No. Hei 5-233478. FIG. 18 is a block diagram showing the schematic of the background art. The operation of the circuit will now be described with reference to FIG. 18.
This circuit consists of a Central Processing Unit (CPU) 1, an Erasable Programmable Read-Only Memory (EPROM) 2, and Static Random Access Memory (SRAM) 3, and Flash Random Access Memory (FRAM) 4, a register 5, and an address bus 9 and a data bus 10 which connect them. The register 5 is used to save the information of the FRAM 4. Further, the CPU 1 is connected to an FRAM rewritten information transfer terminal 7 and an FRAM rewritten information file 8 through an RS232C line 6, and the terminal 7 is operated to send the rewritten information in the file 8 to the CPU 1. Further, information, before the FRAM 4 is all erased or rewritten, is saved in the register 5 temporarily. The saved information is then returned into the FRAM 4 from the register 5 after the FRAM 4 is rewritten.
A data rewriting operation of FRAM 4 will be described. Data that is to be rewritten into the FRAM 4 is downloaded into SRAM 3. Data pertaining to an area of the FRAM 4 that is not subjected to rewriting is copied to a register 5. All the contents of the FRAM 4 are deleted by a FRAM clear program stored in EPROM 2. The data that has been downloaded into the SRAM 3 is copied to the FRAM 4. Further, the data that has been saved in the register 5 is copied to the original area on the FRAM 4.
In the prior art, in a case where volatile memory is used as the register 5 which acts as an area into which data are saved at the time of rewriting of the flash memory, in the event that supply of power to the data processing device is interrupted after erasure of data, data pertaining to an area not to be subjected to rewriting, as well as data pertaining to an area to be subjected to rewriting, are lost, thus deteriorating the reliability of flash memory.
In order to prevent loss of the data recorded in the register, the data must be written into flash memory immediately. From an operational viewpoint, flash memory must be erased every time the data stored in flash memory is rewritten. Eventually, the flash memory must be subjected to the number of erasing operations corresponding to the number of times data is rewritten. A limitation, however, is imposed on the number of times flash memory can be subjected to erasure (usually 100,000 times or thereabouts). The number of times that flash memory is subjected to erasure, however, is increased in the prior art, shortening the life of the flash memory. Thus, the number of times the flash memory is subjected to erasure must be decreased.
Therefore, it is an object of the present invention to overcome the aforementioned problems.
The present invention has been conceived to solve such problems of the prior art and is aimed at providing a data processing device which prevents erasure of data from flash memory, when the data recorded in the flash memory is rewritten, and further exhibits improved reliability when data is written into the flash memory.
A further object of the present invention is to provide a data processing device that minimizes the number of times that flash memory is subjected to erasure. This is achieved through the use of a simple structure, which maintains reliability, when a limitation is imposed on the number of times that flash memory can be subjected to erasure.
Accordingly, a data storage method for rewriting data into a memory is provided. Write data is written to an erasure block buffer, which comprises a first region of a nonvolatile memory. Non-changing data is copied from the memory to the erasure block buffer, whereby the memory has a plurality of erasure-unit regions and the non-changing data is written in predetermined units. An erasure unit number is recorded to an erasure-unit-number hold region, the erasure-unit-number hold region comprising a second region of the non-volatile memory. Non-changing data is then erased only from the erasure-unit regions, which are to be rewritten. A status of the erasure unit number is determined, and the non-changing data and the write data is transferred from the erasure block buffer to the erasure-unit region in the memory, depending on the status of the erasure unit number. If an interruption of the transferring step occurs, the transferring step is resumed in response to the status of the erasure unit number. The erasure unit number is subsequently nullified in the erasure-unit-number hold region when the transferring step is complete.
Moreover, the write data is written in response to a first write request, which requests writing of the write data into the erasure-unit region of the memory. The non-changing data is copied in response to the first write request, and the non-changing data is erased from the erasure-unit region after the non-changing data is completely copied.
A second write data is then written into a write buffer in response to a second write request for requesting writing of the second write data, after the step of writing write data, whereby the write buffer comprises a third region of the non-volatile memory. The write data and non-changing data, in the erasure block buffer, are transferred into the erasure-unit region after second write data is written.
Furthermore, the status of the erasure unit number is determined by comparing the erasure-unit region, to which the write data is to be written, with the erasure-unit region, to which the second write data is to be written. In a case where a match is obtained, processing pertaining to the writing second data and processing pertaining to transferring the write data and non-changing data are performed.
In a further embodiment, a data storage method is provided, for rewriting data into a memory having a plurality of erasure-unit regions. Write data is written to a nonvolatile erasure block buffer. Non-changing data, which is written in predetermined units, is copied from the memory to the erasure block buffer. The non-changing data is then erased from the erasure-unit regions. Both of the non-changing data and the write data are then transferred from the erasure block buffer to the memory. First write data is written, during a first erasure block buffer write step, to the erasure block buffer, in response to a first write request for requesting writing of the first write data into a first erasure-unit region of the memory. The non-changing data, recorded in the first erasure-unit region, is written to the erasure block buffer during a second erasure block buffer write step, in response to the first write request for requesting writing of the first write data to the first erasure-unit region of the memory. Data is then erased, during an erasure step, from the first erasure-unit region, after the second erasure block buffer write step. Finally, the data stored in the erasure block buffer is written to the first erasure-unit region, from which the data have been erased, in response to a second write request for requesting writing of second write data into the memory.
Furthermore, the erasure step is followed by a comparison step of comparing the erasure-unit region into which the first write data is to be written with the erasure-unit region into which the second write data is to be written. In a case where a match is obtained as a comparison result in the comparison step, processing pertaining to writing the data stored in the erasure block buffer to the first erasure-unit region is performed.
In yet another embodiment, a data storage method for rewriting data into a memory having a plurality of erasure-unit regions is provided. First write data is written to an erasure block buffer that comprises a first region of a nonvolatile memory. Second write data is written to a write buffer that comprises a second region of the nonvolatile memory. Non-changing data, which is written in predetermined units, is copied from the memory to the erasure block buffer. An erasure unit number is then recorded to an erasure-unit-number hold region. The erasure-unit-number hold region comprising a third region of the non-volatile memory. Thereafter, the non-changing data is erased only from the erasure-unit regions, which are to be rewritten. Subsequently, a status of the erasure unit number is determined, and the non-changing data and the first and second write data are transferred to the memory. Whereby, the non-changing data is transferred from the erasure block buffer, the first write data is transferred from the erasure block buffer, and the second write data is transferred from the write buffer in response to the status of the erasure unit number. Furthermore, during an interruption of the transferring, the transferring process is resumed, depending on the status of the erasure unit number. Finally, the erasure unit number in the erasure-unit-number hold region is nullified, when the transferring step is complete.
As such, writing the first write data into the erasure block buffer and copying the non-changing data into the erasure block buffer, is performed in response to a first write request for requesting writing of a first write data into the first erasure-unit region of the memory. Wherein, second write data is written into the write buffer, in response to a second write request for requesting writing of the second write data into a second erasure-unit region of the memory, after the erasure block buffer has been written to. Also, third write data is written into the write buffer, in response to a third write request for requesting writing of the third write data into an erasure-unit region of the memory, after the second write data has been written into the write buffer.
Additionally, the status of the erasure unit number is determined by comparing a write request region, which specifies a location in the memory in which the second write data is to be written, with a write request region that specifies a location in the memory in which the third write data is to be written. If the write request region, to which the third write data is to be written, is included in the write request region in which the second write data is to be written, the third write data overwrites the area of the write buffer where the second write data is written.
Moreover, the first write data is written into the erasure block buffer and the non-changing data is copied into the erasure block buffer, in response to a first write request for requesting writing of the first write data into the a first erasure-unit region of the memory. The second write data is written into the write buffer, in response to a second write request for requesting writing of the second write data into a second erasure-unit region of the memory, after the first write data is written and the non-changing data is copied into the erasure block buffer. Wherein, the non-changing data and the first write data is transferred from the erasure unit region into the memory, after the second write data is written into the write buffer and in a case where there arises a third write request for requesting writing third write data into an erasure-unit region of the memory. Also, the second write data, the third write data, and the non-changing data, stored in the second erasure-unit region, is written into the erasure block buffer after the non-changing data and the first write data is transferred from the erasure unit region into the memory.
Plus, the status of the erasure unit number is determined by comparing the erasure-unit region, into which the second write data is to be written, with the erasure-unit region, into which the third write data is to be written. If a match is obtained, processing pertaining to writing the second data and processing pertaining to transferring the first write data and the non-changing data, are performed.
Hence, a data processing device is also provided, which includes: a memory having a plurality of erasure-unit regions wherein data is written in predetermined units into the erasure-unit regions, and wherein data is erased in predetermined units from the memory; an erasure block buffer comprising a first region of a nonvolatile memory, the erasure block buffer permits writing of data to the memory in arbitrary units, stores data that is erased to the memory; and an erasure-unit-number hold region comprising a second region of the non-volatile memory for recording an erasure unit number, wherein during an interruption of processing, a status of the erasure unit number is determined and depending on the status, processing resumes.
The data processing device further includes: an erasure means for erasing the data stored in the erasure-unit regions in the predetermined units and for rewriting the data stored in the erasure-unit region through use of first write data; a write control means that includes a data write means for writing the first write data into the erasure block buffer; a save means for writing, into the erasure block buffer, non-changing data which are not to be rewritten by the first write data from among the data stored in the erasure-unit region of the memory; and a memory write means for writing the first write data and the non-changing data, both data sets being written into the erasure block buffer, into the erasure-unit region from which the data have been erased by the erasure means.
Whereby the erasure block buffer for stores both write data that is to be written into the erasure-unit region and non-changing data stored in the erasure-unit region. The data processing device also further comprises write control means that includes a data write means for writing first write data into the erasure block buffer, in response to a first write request for requesting writing of the first write data into a first erasure-unit region of the memory; a save means for writing into the erasure block buffer non-changing data stored in the first erasure-unit region, in response to the first request for requesting writing of the first write data into the first erasure-unit region of the memory; and a memory write means for writing into the first erasure-unit region the data written in the erasure block buffer. As such, the erasure block buffer retains the first write data and the non-changing data, stored in the first erasure-unit region, until a second write request is issued after the first write request and the data write means writes the second write data into the erasure block buffer in a case where the second write request requests writing of the second write data into the first erasure-unit region, and the memory write means writing, to the first erasure-unit region, data belonging to the erasure block buffer in which the second write data are written.
Alternatively, the data processing device may also include: a write buffer, which comprises a third region of the nonvolatile memory, for storing the write data without storing the non-changing data; a write control means that includes a data write means for writing first write data into the erasure block buffer, in response to a first write request for requesting writing of the first write data into a first erasure-unit region of the memory; a save means for writing into the erasure block buffer non-changing data stored in the first erasure-unit region, in response to the first request for requesting writing of the first write data into the first erasure-unit region of the memory; and a write buffer write means, which is included in the write control means, for writing second write data into the write buffer, in response to a second write request for writing the second write data into a second erasure-unit region of the memory. Wherein the write buffer retains the second write data until a third write request is issued after the second write request. Wherein the write buffer write means writes third write data into the write buffer in a case where the third write request requests writing of the third write data into the write request region for the second write data.
Further scope of applicability of the present invention will become apparent from the detailed description given hereinafter. However, it should be understood that the detailed description and specific examples, while indicating preferred embodiments of the invention, are given by way of illustration only, since various changes and modifications within the spirit and scope of the invention will become apparent to those skilled in the art from this detailed description.